1. Field of the Invention
The present invention relates in general to a memory control system, and pertains, more particularly, to an improved system for memory addressing in a memory that is adapted to receive different capacity memory boards or memory arrays. Even more particularly, the invention pertains to an improved memory control system operating on the basis of dynamic memory array configurability.
2. Background Discussion
Generally speaking, in computer memory systems the address ranges of multiple memory arrays in a backplane are set employing relatively complicated schemes that require attention each time that the memory array is changed to replace it with a different capacity memory. Existing memory systems do not easily accommodate the substitution of different capacity memory boards. With the existing systems if different sized arrays are to be used in the same backplane typically there are a number of special rules that must be followed so that operation is carried out properly. Even when these rules are used to provide workable configurations of memory arrays, "holes" sometimes occur in the logical memory address space. These holes put an extra burden on the operating system in that it has to take extra memory space and time to keep track of missing memory pages.
Accordingly, it is an object of the present invention to provide a dynamic memory array configuration system that allows multiple memory array sizes to reside at the same memory backplane area and with a minimum of rules for configuration.
Another object of the present invention is to provide an improved memory control system as in accordance with the preceding object and in which there is a minimizing of the number of holes in the address space.
A further object of the present invention is to provide an improved memory control system for memory array configurability and that employs software control to set-up the decoding of the memory arrays without requiring operator assistance.
Still another object of the present invention is to provide a memory control system as in accordance with all of the preceding objects and in which the system can be implemented very easily, requires minimal initial operator set-up, and that is readily modifiable to accommodate various changes in memory array (board) capacity.